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| Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order number: MPC962305 Rev 5, 08/2004 Low-Cost 3.3 V Zero Delay Buffer The MPC962309 is a zero delay buffer designed to distribute high-speed clocks. Available in a 16-pin SOIC or TSSOP package, the device accepts one reference input and drives nine low-skew clocks. The MPC962305 is the 8-pin version of the MPC962309 which drives five outputs with one reference input. The -1H versions of these devices have higher drive than the -1 devices and can operate up to 100/-133 MHz frequencies. These parts have on-chip PLLs which lock to an input clock presented on the REF pin. The PLL feedback is on-chip and is obtained from the CLOCKOUT pad. Features MPC962305 MPC962309 D SUFFIX 8-LEAD SOIC PACKAGE CASE 751-06 Freescale Semiconductor, Inc... * * * * * * * * * * * * * * 1:5 LVCMOS zero-delay buffer (MPC962305) 1:9 LVCMOS zero-delay buffer (MPC962309) Zero input-output propagation delay Multiple low-skew outputs 250 ps max output-output skew 700 ps max device-device skew Supports a clock I/O frequency range of 10 MHz to 133 MHz, compatible with CPU and PCI bus frequencies Low jitter, 200 ps max cycle-cycle, and compatible with Pentium(R) based systems Test Mode to bypass PLL (MPC962309 only. See "Select Input Decoding") 8-pin SOIC or 8-pin TSSOP package (MPC962305);16-pin SOIC or 16-pin TSSOP package (MPC962309) Single 3.3 V supply Ambient temperature range: -40C to +85C Compatible with the CY2305, CY23S05, CY2309, CY23S09 Spread spectrum compatible DT SUFFIX 8-LEAD TSSOP PACKAGE CASE 948J-01 D SUFFIX 16-LEAD SOIC PACKAGE CASE 751B-05 DT SUFFIX 16-LEAD TSSOP PACKAGE CASE 948F-01 Functional Description The MPC962309 has two banks of four outputs each, which can be controlled by the Select Inputs as shown in Table 3.Select Input Decoding for MPC962309. Bank B can be tri-stated if all of the outputs are not required. Select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes. The MPC962305 and MPC962309 PLLs enters a power down state when there are no rising edges on the REF input. During this state, all of the outputs are in tristate, the PLL is turned off, and there is less than 25.0 A of current draw for the device. The PLL shuts down in one additional case as shown in Table 3.Select Input Decoding for MPC962309. Multiple MPC962305 and MPC962309 devices can accept the same input clock and distribute it throughout the system. In this situation, the difference between the output skews of two devices will be less than 700 ps. All outputs have less than 200 ps of cycle-cycle jitter. The input-to-output propagation delay on both devices is guaranteed to be less than 350 ps and the output-to-output skew is guaranteed to be less than 250 ps. The MPC962305 and MPC962309 are available in two/three different configurations, as shown on the ordering information page. The MPC962305-1/MPC962309-1 are the base parts. High drive versions of those devices, MPC962305-1H and MPC962309-1H, are available to provide faster rise and fall times of the base device. (c) Motorola, Inc. 2004 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. MPC962305 MPC962309 Block Diagram PLL MUX REF CLKOUT CLKA1 CLKA2 CLKA3 CLKA4 Pin Configuration REF CLKA1 CLKA2 VDD GND CLKB1 CLKB2 S2 SOIC/TSSOP Top View 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SOIC/TSSOP Top View 1 8 2 7 3 6 4 5 CLKOUT CLKA4 CLKA3 VDD GND CLKB4 CLKB3 S1 S2 S1 CLKB1 Select Input Decoding CLKB2 CLKB3 CLKB4 REF CLK2 CLK1 GND Freescale Semiconductor, Inc... CLKOUT CLK4 VDD CLK3 Table 1. Pin Description for MPC962309 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 REF1 CLKA12 CLKA22 VDD GND CLKB1 3 3 2 Signal Buffered clock output, Bank A Buffered clock output, Bank A 3.3 V supply Ground Buffered clock output, Bank B Buffered clock output, Bank B Select input, bit 2 Select input, bit 1 Buffered clock output, Bank B Buffered clock output, Bank B Ground 3.3 V supply Buffered clock output, Bank A Buffered clock output, Bank A 2 Description Input reference frequency, 5 V-tolerant input CLKB22 S2 S1 CLKB32 CLKB4 GND VDD CLKA32 CLKA4 2 2 CLKOUT Buffered output, internal feedback on this pin Table 2. Pin Description for MPC962305 Pin 1 2 3 4 5 6 7 8 REF 1 Signal CLK22 CLK12 GND CLK3 VDD CLK42 CLKOUT2 2 Description Input reference frequency, 5 V-tolerant input Buffered clock output Buffered clock output Ground Buffered clock output 3.3 V supply Buffered clock output Buffered clock output, internal feedback on this pin3 1. Weak pull-down. 2. Weak pull-down on all outputs. 3. Weak pull-ups on these inputs. TIMING SOLUTIONS 2 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. MPC962305 MPC962309 Table 3. Select Input Decoding for MPC962309 S2 0 0 1 1 S1 0 1 0 1 CLOCK A1-A4 Three-State Driven Driven Driven CLOCK B1-B4 Three-State Three-State Driven Driven CLKOUT1 Driven Driven Driven Driven Output Source PLL PLL Reference PLL PLL Shutdown N N Y N 1. This output is driven and has an internal feedback for the PLL. The load on this output can be adjusted to change the skew between the reference and output. Table 4. Maximum Ratings Characteristics Supply Voltage to Ground Potential Value -0.5 to +3.9 -0.5 to VDD+0.5 -0.5 to 5.5 -65 to +150 150 >2000 Unit V V V C C V Freescale Semiconductor, Inc... DC Input Voltage (Except Ref) DC Input Voltage REF Storage Temperature Junction Temperature Static Discharge Voltage (per MIL-STD-883, Method 3015) Table 5. Operating Conditions for MPC962305-X and MPC962309-X Industrial Temperature Devices Parameter VDD TA CL CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance, below 100 MHz Load Capacitance, from 100 MHz to 133 MHz Input Capacitance Description Min 3.0 -40 Max 3.6 85 30 10 7 Unit V C pF pF pF Table 6. Electrical Characteristics for MPC962305-X and MPC962309-X Industrial Temperature Devices1 Parameter VIL VIH IIL IIH VOL VOH IDD (PD mode) IDD Description Input LOW Voltage2 Input HIGH Voltage2 Input LOW Current Input HIGH Current Output LOW Voltage3 Output HIGH Voltage3 Power Down Supply Current Supply Current VIN = 0 V VIN = VDD IOL = 8 mA (-1) IOH = 12 mA (-1H) IOH = -8 mA (-1) IOL = -12 mA (-1H) REF = 0 MHz Unloaded outputs at 66.67 MHz, SEL inputs at VDD 2.4 25.0 35.0 2.0 50.0 100.0 0.4 Test Conditions Min Max 0.8 Unit V V A A V V A mA 1. All parameters are specified with loaded outputs. 2. REF input has a threshold voltage of VPP/2. 3. Parameter is guaranteed by design and characterization. Not 100% tested in production. MOTOROLA 3 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MPC962305 MPC962309 Table 7. Switching Characteristics for MPC962305-1 and MPC962309-1 Industrial Temperature Devices1 Parameter t1 Name Output Frequency Duty Cycle2 = t2 / t1 t3 t4 t5 t6A t6B t7 tJ tLOCK Rise Time2 Fall Time2 Output to Output Skew2 Delay, REF Rising Edge to CLKOUT Rising Edge2 Delay, REF Rising Edge to CLKOUT Rising Edge2 Device to Device Skew Cycle to Cycle Jitter2 PLL Lock Time2 2 Test Conditions 30-pF load 10-pF load Measured at 1.4 V, FOUT = 66.67 MHz Measured between 0.8 V and 2.0 V Measured between 0.8 V and 2.0 V All outputs equally loaded Measured at VDD/2 Measured at VDD/2. Measured in PLL Bypass Mode, MPC962309 device only Measured at VDD/2 on the CLKOUT pins of devices Measured at 66.67 MHz, loaded outputs Stable power supply, valid clock presented on REF pin Min 10 10 40.0 Typ Max 100 133.33 Unit MHz MHz % ns ns ps ps ns 50.0 60.0 2.50 2.50 250 0 1 5 350 8.7 Freescale Semiconductor, Inc... 0 700 200 1.0 ps ps ms 1. All parameters are specified with loaded outputs. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production. Table 8. Switching Characteristics for MPC962305-1H and MPC962309-1H Industrial Temperature Devices1 Parameter t1 Name Output Frequency Duty Cycle2 = t2 / t1 Duty Cycle2 = t2 / t1 t3 t4 t5 t6A t6B t7 t8 tJ tLOCK Rise Time2 Fall Time2 Output to Output Skew2 30-pF load 10-pF load Measured at 1.4 V, FOUT = 66.67 MHz Measured at 1.4 V, FOUT < 50 MHz Measured between 0.8 V and 2.0 V Measured between 0.8 V and 2.0 V All outputs equally loaded 0 1 5 Test Conditions Min 10 10 40.0 45.0 50.0 55.0 Typ Max 100 133.33 60.0 55.0 1.50 1.50 250 350 8.7 Unit MHz MHz % % ns ns ps ps ns Delay, REF Rising Edge to Measured at V /2 DD CLKOUT Rising Edge2 Delay, REF Rising Edge to Measured at VDD/2. Measured in PLL Bypass Mode, CLKOUT Rising Edge2 MPC962309 device only Measured at VDD/2 on the CLKOUT pins of devices Measured between 0.8 V and 2.0 V using Test Circuit #2 Measured at 66.67 MHz, loaded outputs Stable power supply, valid clock presented on REF pin 1 Device to Device Skew2 Output Slew Rate2 Cycle to Cycle Jitter2 PLL Lock Time2 0 700 ps V/ns 200 1.0 ps ms 1. All parameters are specified with loaded outputs. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production. TIMING SOLUTIONS 4 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. MPC962305 MPC962309 APPLICATIONS INFORMATION VCC 1.4 V GND VCC 1.4 V GND t5 The pin-to-pin skew is defined as the worst case difference in propagation delay between any similar delay path within a single device t6 FB_IN CCLK VCC VCC / 2 GND VCC VCC / 2 GND Figure 1. Output-to-Output Skew tSK(O) Figure 2. Static Phase Offset Test Reference Freescale Semiconductor, Inc... VCC 1.4 V GND t2 t1 DC = t2/t1 x 100% t7 The time from the PLL controlled edge to the non-controlled edge, divided by the time between PLL controlled edges, expressed as a percentage DEVICE 2 DEVICE 1 VCC VCC / 2 GND VCC VCC / 2 GND Figure 4. Device-to-Device Skew Figure 3. Output Duty Cycle (DC) VCC = 3.3 V 2.0 tJ = |tN-tN+1| t4 t3 0.8 tN tN+1 The variation in cycle time of a signal between adjacent cycles, over a random sample of adjacent cycle pairs Figure 5. Cycle-to-Cycle Jitter Figure 6. Output Transition Time Test Reference MOTOROLA 5 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MPC962305 MPC962309 Test Circuit #1 VDD 0.1 F OUTPUTS CLKOUT CLOAD VDD 0.1 F GND GND 0.1 F VDD GND GND 0.1 F Test Circuit #2 VDD OUTPUTS 1K 1K CLKOUT 10 pF Test Circuit for all parameters except t8 Test Circuit for t8, Output slew rate on -1H, -5 device Freescale Semiconductor, Inc... Table 9. Ordering Information Ordering Code MPC962305D-1 MPC962305D-1R2 MPC962305D-1H MPC962305D-1HR2 MPC962305DT-1H MPC962305DT-1HR2 MPC962309D-1 MPC962309D-1R2 MPC962309D-1H MPC962309D-1HR2 MPC962309DT-1H MPC962309DT-1HR2 8-pin 150-mil SOIC 8-pin 150-mil SOIC-Tape and Reel 8-pin 150-mil SOIC 8-pin 150-mil SOIC-Tape and Reel 8-pin 150-mil TSSOP 8-pin 150-mil TSSOP-Tape and Reel 16-pin 150-mil SOIC 16-pin 150-mil SOIC-Tape and Reel 16-pin 150-mil SOIC 16-pin 150-mil SOIC-Tape and Reel 16-pin 4.4-mm TSSOP 16-pin 4.4-mm TSSOP-Tape and Reel Package Type TIMING SOLUTIONS 6 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. MPC962305 MPC962309 PACKAGE DIMENSIONS D SUFFIX 8-LEAD SOIC PACKAGE CASE 751-06 ISSUE T A 8 D 5 C E 1 4 H 0.25 M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0 7 h B X 45 Freescale Semiconductor, Inc... e A SEATING PLANE C L 0.10 A1 B 0.25 M CB S A S DIM A A1 B C D E e H h L q STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. PIN'S NUMBER EMITTER COLLECTOR COLLECTOR EMITTER EMITTER BASE BASE EMITTER 0.25 8X M B 6.2 5.8 STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. COLLECTOR, DIE, #1 COLLECTOR, #1 COLLECTOR, #2 COLLECTOR, #2 BASE, #2 EMITTER, #2 BASE, #1 EMITTER, #1 A D SUFFIX STYLE SOIC PACKAGE 16-LEAD 3: DRAIN, DIE #1 PIN 1. CASEDRAIN, #1 2. 751B-05 3. DRAIN, #2 ISSUE K 4. DRAIN, #2 1.75 1.35 5. 6. 7. 8. GATE, #2 SOURCE, #2 GATE, #1 SOURCE, #1 0.25 STYLE 4: PIN 1. 2. 3. 4. 5. 6. 7. 8. ANODE ANODE ANODE ANODE ANODE ANODE ANODE COMMON CATHODE 0.10 16X STYLE 5: 1 PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. DRAIN PIN 1 INDEX 5. GATE 6. GATE 7. SOURCE 8. SOURCE STYLE 6: 16 1. PIN 2. 3. 4. 5. 6. 7. 8. SOURCE DRAIN DRAIN SOURCE SOURCE GATE GATE SOURCE 4 STYLE 9: PIN 1. 2. 3. 4. 5. 6. 7. 8. 10.0 9.8 STYLE 7: PIN 1. 2. 3. 4. 5. 6. 7. 8. INPUT EXTERNAL BYPASS THIRD STAGE SOURCE 14X GROUND DRAIN 1.27 GATE 3 SECOND STAGE Vd FIRST STAGE Vd 0.49 0.35 0.25 6 M A EMITTER, COMMON COLLECTOR, DIE #1 COLLECTOR, DIE #2 EMITTER, COMMON EMITTER, COMMON 8 BASE, DIE #2 BASE, DIE #1 EMITTER, COMMON STYLEA 10: PIN 1. 2. 3. 4. 5. 9 6. 7. 8. GROUND BIAS 1 OUTPUT GROUND GROUND BIAS 2 INPUT GROUND STYLE 11: PIN 1. 2. 3. 4. 5. 6. 7. 8. 4.0 3.8 STYLE 13: PIN 1. 2. 3. 4. 5. 0.50 6. 7. 0.25 8. N.C. SOURCE SOURCE GATE DRAIN DRAIN X45 DRAIN DRAIN B STYLE 14: PIN 1. 2. 3. 4. 5. 6. 7. 8. N-SOURCE N-GATE P-SOURCE P-GATE P-DRAIN P-DRAIN N-DRAIN N-DRAIN STYLE 15: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 SEATING T DRAIN 1 PLANE 16X 0.1 T ANODE 1 ANODE 1 ANODE 1 ANODE 1 CATHODE, COMMON CATHODE, COMMON CATHODE, COMMON CATHODE, 0.25 COMMON 5 STYLE 8: T PIN 1. COLLECTOR, DIE #1 AB 2. BASE, #1 3. BASE, #2 4. COLLECTOR, #2 5. COLLECTOR, #2 6. EMITTER, #2 7. EMITTER, #1 NOTES: 8. 1. DIMENSIONS ARE IN MILLIMETERS. COLLECTOR, #1 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DATUMS A AND B TO BE DETERMINED AT THE STYLE 12: PLANE WHERE THE BOTTOM OF THE LEADS PIN 1. SOURCE PLASTIC BODY. EXIT THE 2.4.SOURCE THIS DIMENSION DOES NOT INCLUDE MOLD 3. SOURCE PROTRUSION OR GATE BURRS. MOLD FLASH, 4. GATE FLASH, PROTRUSION OR GATE BURRS SHALL 5. DRAIN EXCEED 0.15MM PER SIDE. THIS NOT 6. DRAIN DIMENSION IS DETERMINED AT THE PLANE 7. DRAIN THE BOTTOM OF THE LEADS EXIT WHERE 8. DRAINPLASTIC BODY. THE 5. THIS DIMENSION DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS STYLE 16: SHALL NOT EXCEED 0.25MM PER SIDE. THIS PIN 1. EMITTER, DIE #1 DETERMINED AT THE PLANE DIMENSION IS 2. BASE, DIETHE BOTTOM OF THE LEADS EXIT WHERE #1 3. EMITTER, DIE #2 THE PLASTIC BODY. 4.6.BASE, DIE #2 THIS DIMENSION DOES NOT INCLUDE 5. COLLECTOR, DIE #2 DAMBAR PROTRUSION. ALLOWABLE 6. COLLECTOR, DIE #2 DAMBAR PROTRUSION SHALL NOT CAUSE 7. COLLECTOR, DIE #1TO EXCEED 0.62MM. THE LEAD WIDTH 8. COLLECTOR, DIE #1 0.19 STYLE 17: PIN 1. 2. 3. 4. 5. 6. 7. 8. VCC V2OUT V1OUT TXE RXE VEE GND ACC STYLE 18: PIN 1. 2. 3. 4. 5. 6. 7. 8. ANODE ANODE SOURCE GATE DRAIN DRAIN CATHODE CATHODE 1.25 0.40 SECTION A-A 7 0 MOTOROLA 7 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MPC962305 MPC962309 PACKAGE DIMENSIONS DT SUFFIX 8-LEAD TSSOP PACKAGE CASE 948J-01 ISSUE O K 0.15 (0.006) T U S 8x REF M 0.10 (0.004) TU S V S K 2X L/2 8 K1 5 J J1 Freescale Semiconductor, Inc... L PIN 1 IDENT. 1 4 B -USECTION N-N N 0.25 (0.010) 0.15 (0.006) T U S A -VN F DETAIL E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. M DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 2.90 3.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 _ 8_ INCHES MIN MAX 0.114 0.122 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 _ 8_ C 0.10 (0.004) -TSEATING PLANE -WG H D SEE DETAIL E CASE 948J-01 ISSUE O DATE 08/21/95 TIMING SOLUTIONS 8 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. MPC962305 MPC962309 PACKAGE DIMENSIONS DT SUFFIX 16-LEAD TSSOP PACKAGE CASE 948F-01 ISSUE O K 0.15 (0.006) T U S 16X REF M 0.10 (0.004) TU S V S K K1 2X L/2 16 9 J1 B -USECTION N-N J Freescale Semiconductor, Inc... L PIN 1 IDENT. 1 8 N 0.25 (0.010) 0.15 (0.006) T U S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. A -VN F DETAIL E M DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8 C 0.10 (0.004) -TSEATING PLANE -W- H D G DETAIL E CASE 948F-01 ISSUE O DATE 12/20/ MOTOROLA 9 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MPC962305 MPC962309 NOTES Freescale Semiconductor, Inc... TIMING SOLUTIONS 10 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. MPC962305 MPC962309 NOTES Freescale Semiconductor, Inc... MOTOROLA 11 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. MOTOROLA and the Stylized M Logo are registered in the US Patent and Trademark Office. All other product or service names are the property of their respective owners. (c) Motorola, Inc. 2004 HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors For More Information On This Product, Go to: www.freescale.com MPC962305 |
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